PIC18F2420-I/ML Microchip Technology, PIC18F2420-I/ML Datasheet - Page 207

• Manufacturer Part Number: PIC18F2420-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2420-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.1
The BRG is a dedicated, 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSART. By default, the BRG operates
in 8-bit mode; setting the BRG16 bit (BAUDCON<3>)
selects 16-bit mode.
The SPBRGH:SPBRG register pair controls the period
of a free-running timer. In Asynchronous mode, bits,
BRGH (TXSTA<2>) and BRG16 (BAUDCON<3>), also
control the baud rate. In Synchronous mode, BRGH is
ignored. Table 18-1 shows the formula for computation
of the baud rate for different EUSART modes which
only apply in Master mode (internally generated clock).
Given the desired baud rate and F
integer value for the SPBRGH:SPBRG registers can be
calculated using the formulas in Table 18-1. From this,
the error in baud rate can be determined. An example
calculation is shown in Example 18-1. Typical baud
rates and error values for the various Asynchronous
modes
TABLE 18-1:
© 2008 Microchip Technology Inc.
Legend: x = Don’t care, n = value of SPBRGH:SPBRG register pair
SYNC
0
0
0
0
1
1
are
Baud Rate Generator (BRG)
Configuration Bits
shown
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
in
Table 18-2.
BRGH
0
1
0
1
x
x
OSC
, the nearest
It
PIC18F2420/2520/4420/4520
may
BRG/EUSART Mode
be
16-Bit/Asynchronous
16-Bit/Asynchronous
16-Bit/Synchronous
8-Bit/Asynchronous
8-Bit/Asynchronous
8-Bit/Synchronous
advantageous to use the high baud rate (BRGH = 1) or
the 16-bit BRG to reduce the baud rate error, or
achieve a slow baud rate for a fast oscillator frequency.
Writing a new value to the SPBRGH:SPBRG registers
causes the BRG timer to be reset (or cleared). This
ensures the BRG does not wait for a timer overflow
before outputting the new baud rate.
18.1.1
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRG register pair.
18.1.2
The data on the RX pin is sampled three times by a
majority detect circuit to determine if a high or a low
level is present at the RX pin.
OPERATION IN POWER-MANAGED
MODES
SAMPLING
Baud Rate Formula
F
F
F
OSC
OSC
OSC
/[64 (n + 1)]
/[16 (n + 1)]
/[4 (n + 1)]
DS39631E-page 205