DSPIC33FJ16GS504-I/PT Microchip Technology, DSPIC33FJ16GS504-I/PT Datasheet - Page 333

• Manufacturer Part Number: DSPIC33FJ16GS504-I/PT
• Description: IC DSPIC MCU/DSP 16K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS504-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE A-1:
© 2009 Microchip Technology Inc.
Section 16.0 “Inter-Integrated
Circuit (I
Section 17.0 “Universal
Asynchronous Receiver Transmitter
(UART)”
Section 18.0 “High-Speed 10-bit
Analog-to-Digital Converter (ADC)”
2
C™)”
Section Name
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
MAJOR SECTION UPDATES (CONTINUED)
Removed the following sections, which are now available in the related
section of the dsPIC33F Family Reference Manual:
• 16.3 “I
• 16.4 “Baud Rate Generator” (retained Figure 16-1: I
• 16.5 “I
• 16.6 “Slave Address Masking”
• 16.7 “IPMI Support”
• 16.8 “General Call Address Support”
• 16.9 “Automatic Clock Stretch”
• 16.10 “Software Controlled Clock Stretching (STREN = 1)”
• 16.11 “Slope Control”
• 16.12 “Clock Arbitration”
• 16.13 “Multi-Master Communication, Bus Collision, and Bus Arbitration
Removed the following sections, which are now available in the related
section of the dsPIC33F Family Reference Manual:
• 17.1 “UART Baud Rate Generator”
• 17.2 “Transmitting in 8-bit Data Mode
• 17.3 “Transmitting in 9-bit Data Mode
• 17.4 “Break and Sync Transmit Sequence”
• 17.5 “Receiving in 8-bit or 9-bit Data Mode”
• 17.6 “Flow Control Using UxCTS and UxRTS Pins”
• 17.7 “Infrared Support”
Removed IrDA references and Note 1, and updated the bit and bit value
descriptions for UTXINV (UxSTA<14>) in the UARTx Status and Control
Register (see Register 17-2).
Updated bit value information for A/D Control Register (see Register 18-1).
Updated TRGSRC6 bit value for Timer1 period match in the A/D Convert
Pair Control Register 3 (see Register 18-8).
2
2
Preliminary
C Interrupts”
C Module Addresses
Update Description
2
C Block Diagram)
DS70318D-page 331