AT32UC3A0256-ALUT Atmel, AT32UC3A0256-ALUT Datasheet - Page 557

IC MCU AVR32 256KB FLASH 144LQFP

AT32UC3A0256-ALUT

Manufacturer Part Number
AT32UC3A0256-ALUT
Description
IC MCU AVR32 256KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A0256-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, RS-485, SPI, USART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A0256-ALUT
Manufacturer:
ATMEL
Quantity:
167
Part Number:
AT32UC3A0256-ALUT
Manufacturer:
Atmel
Quantity:
10 000
30.8.2.2
Offset:
Register Name:
Access Type:
Reset Value:
• SUSP: Suspend Interrupt Flag
Set by hardware when a USB “Suspend” idle bus state has been detected for 3 frame periods (J state for 3 ms). This trig-
gers a USB interrupt if SUSPE = 1.
Shall be cleared by software (by setting the SUSPC bit) to acknowledge the interrupt.
Cleared by hardware when a Wake-Up interrupt (WAKEUP) is raised.
• SOF: Start of Frame Interrupt Flag
Set by hardware when a USB “Start of Frame” PID (SOF) has been detected (every 1 ms). This triggers a USB interrupt if
SOFE = 1. The FNUM field is updated.
Shall be cleared by software (by setting the SOFC bit) to acknowledge the interrupt.
• EORST: End of Reset Interrupt Flag
Set by hardware when a USB “End of Reset” has been detected. This triggers a USB interrupt if EORSTE = 1.
Shall be cleared by software (by setting the EORSTC bit) to acknowledge the interrupt.
• WAKEUP: Wake-Up Interrupt Flag
Asynchronous interrupt.
Set by hardware when the USB controller is reactivated by a filtered non-idle signal from the lines (not by an upstream
resume). This triggers an interrupt if WAKEUPE = 1.
Shall be cleared by software (by setting the WAKEUPC bit) to acknowledge the interrupt (USB clock inputs must be
enabled before).
Cleared by hardware when a Suspend interrupt (SUSP) is raised.
32058J–AVR32–04/11
EP3INT
31
23
15
ru
0
7
USB Device Global Interrupt Register (UDINT)
DMA6INT
EP2INT
UPRSM
14
30
22
ru
ru
ru
0
0
6
0
DMA5INT
EORSM
EP1INT
29
21
13
ru
ru
ru
0
0
5
0
0x0004
UDINT
Read-Only
0x00000000
DMA4INT
WAKEUP
EP0INT
28
20
12
ru
ru
ru
0
0
4
0
DMA3INT
EORST
27
19
11
ru
ru
0
3
0
DMA2INT
EP6INT
SOF
26
18
10
ru
ru
ru
0
0
2
0
DMA1INT
EP5INT
25
17
ru
ru
0
0
9
1
AT32UC3A
EP4INT
SUSP
24
16
ru
ru
0
8
0
0
557

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