AT32UC3A0256-ALUT Atmel, AT32UC3A0256-ALUT Datasheet - Page 571

• Manufacturer Part Number: AT32UC3A0256-ALUT
• Description: IC MCU AVR32 256KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0256-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 144LQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

30.8.2.10
Offset:
Register Name:
Access Type:
Reset Value:
• ALLOC: Endpoint Memory Allocate
Set to allocate the endpoint memory.
Clear to free the endpoint memory.
Cleared by hardware upon receiving a USB reset (except for the endpoint 0).
Note that after setting this bit, the user should check the CFGOK bit to know whether the allocation of this endpoint is
correct.
• EPBK: Endpoint Banks
Set to select the number of banks for the endpoint:
For control endpoints, a single-bank endpoint (00b) should be selected.
Cleared by hardware upon receiving a USB reset (except for the endpoint 0).
32058J–AVR32–04/11
31
23
15
–
–
–
7
–
0
0
1
1
USB Endpoint X Configuration Register (UECFGX)
EPBK
30
22
14
–
–
–
6
0
0
1
0
1
EPSIZE
rwu
29
21
13
–
–
–
5
0
Endpoint Banks
1 (single-bank endpoint)
2 (double-bank endpoint)
3 (triple-bank endpoint)
Reserved
0x0100 + X . 0x04
UECFGX, X in [0..6]
Read/Write
0x00000000
28
20
12
–
–
0
4
0
EPTYPE
rwu
27
19
11
–
–
0
3
0
EPBK
rwu
26
18
10
–
–
–
2
0
AUTOSW
ALLOC
rwu
rwu
25
17
–
–
9
0
1
0
AT32UC3A
EPDIR
rwu
24
16
–
–
8
0
0
–
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