P89LV51RD2BBC,557 NXP Semiconductors, P89LV51RD2BBC,557 Datasheet - Page 15

IC 80C51 MCU FLASH 64K 44-TQFP

P89LV51RD2BBC,557

Manufacturer Part Number
P89LV51RD2BBC,557
Description
IC 80C51 MCU FLASH 64K 44-TQFP
Manufacturer
NXP Semiconductors
Series
89LVr
Datasheet

Specifications of P89LV51RD2BBC,557

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
44-TQFP, 44-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Processor Series
P89LV5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Cpu Family
89LV
Device Core
80C51
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1008 - BOARD FOR LPC9103 10-HVSON622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1289
935274177557
P89LV51RD2BBC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LV51RD2BBC,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
P89LV51RB2_RC2_RD2_5
Product data sheet
6.2.3 Software reset
6.2.4 Brownout detect reset
work during initial power up, before the voltage reaches the brownout detection level. The
POF flag in the PCON register is set to indicate an initial power up condition. The POF
flag will remain active until cleared by software.
Following a power-on or external reset the P89LV51RB2/RC2/RD2 will force the SWR and
BSEL bits (FCF[1:0]) to 00. This causes the boot block to be mapped into the lower 8 kB
of code memory and the device will execute the ISP code in the boot block and attempt to
autobaud to the host. If the autobaud is successful the device will remain in ISP mode. If,
after approximately 400 ms, the autobaud is unsuccessful the boot block code will check
to see if the SoftICE flag is set (from a previous programming operation). If the SoftICE
flag is set the device will enter SoftICE mode. If the SoftICE flag is cleared, the boot code
will execute a software reset causing the device to execute the user code from block 0
starting at address 0000H. Note that an external reset applied to the RST pin has the
same effect as a power-on reset.
A software reset is executed by changing the SWR bit (FCF.1) from ‘0’ to ‘1’. A software
reset will reset the program counter to address 0000H and force both the SWR and BSEL
bits (FCF[1:0]) to 10. This will result in the lower 8 kB of the user code memory being
mapped into the user code memory space. Thus the user's code will be executed starting
at address 0000H. A software reset will not change bit WDTC.2 or RAM data. Other SFRs
will be set to their reset values.
The device includes a brownout detection circuit to protect the system from severe supply
voltage fluctuations. The P89LV51RB2/RC2/RD2's brownout detection threshold is 2.35 V.
When V
generate a brownout interrupt but the CPU still runs until the supplied voltage returns to
the brownout detection voltage V
cause a processor reset.
Fig 4.
DD
Power-on reset circuit
drops below this voltage threshold, the brownout detect triggers the circuit to
Rev. 05 — 15 December 2009
V
DD
10 F
8.2 k
bo
. The default operation for a brownout detection is to
C 2
C 1
P89LV51RB2/RC2/RD2
RST
XTAL2
XTAL1
8-bit microcontrollers with 80C51 core
V
002aaa543
DD
© NXP B.V. 2009. All rights reserved.
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