P89LV51RD2BBC,557 NXP Semiconductors, P89LV51RD2BBC,557 Datasheet - Page 49

• Manufacturer Part Number: P89LV51RD2BBC,557
• Description: IC 80C51 MCU FLASH 64K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89LVr

Specifications of P89LV51RD2BBC,557

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P89LV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Cpu Family: 89LV
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1017 - BOARD 44-ZIF PLCC SOCKET622-1008 - BOARD FOR LPC9103 10-HVSON622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1289; 935274177557; P89LV51RD2BBC

NXP Semiconductors
P89LV51RB2_RC2_RD2_5
Product data sheet
Table 37.
Table 38.
Bit addressable; reset value: 00H.
Table 39.
Table 40.
Not bit addressable; reset value: 00H.
Table 41.
CPS1
0
0
1
1
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
Bit
Symbol
Bit
Symbol
CMOD - PCA counter mode register (address D9H) count pulse select
CCON - PCA counter control register (address 0D8H) bit allocation
CCON - PCA counter control register (address 0D8H) bit descriptions
CCAPMn - PCA modules compare/capture register (address CCAPM0: 0DAH,
CCAPM1: 0DBH, CCAPM2: 0DCH, CCAPM3: 0DDH, CCAPM4: 0DEH) bit
allocation
CCAPMn - PCA modules compare/capture register (address CCAPM0: 0DAH,
CCAPM1: 0DBH, CCAPM2: 0DCH, CCAPM3: 0DDH, CCAPM4: 0DEH) bit
descriptions
Symbol
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
Symbol
-
ECOMn
CAPPn
CAPNn
CF
7
7
-
CPS0
0
1
0
1
Rev. 05 — 15 December 2009
ECOMn
CR
6
Description
PCA Counter Overflow Flag. Set by hardware when the counter rolls
over. CF flags an interrupt if bit ECF in CMOD is set. CF may be set by
either hardware or software but can only be cleared by software.
PCA Counter Run Control Bit. Set by software to turn the PCA counter
on. Must be cleared by software to turn the PCA counter off.
Reserved for future use. Should be set to
PCA Module 4 Interrupt Flag. Set by hardware when a match or
capture occurs. Must be cleared by software.
PCA Module 3 Interrupt Flag. Set by hardware when a match or
capture occurs. Must be cleared by software.
PCA Module 2 Interrupt Flag. Set by hardware when a match or
capture occurs. Must be cleared by software.
PCA Module 1 Interrupt Flag. Set by hardware when a match or
capture occurs. Must be cleared by software.
PCA Module 0 Interrupt Flag. Set by hardware when a match or
capture occurs. Must be cleared by software.
6
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Enable Comparator. ECOMn = 1 enables the comparator function.
Capture Positive, CAPPn = 1 enables positive edge capture.
Capture Negative, CAPNn = 1 enables negative edge capture.
CAPPn
5
5
-
Select PCA input
0 Internal clock, f
1 Internal clock, f
2 Timer 0 overflow
3 External clock at ECI/P1.2 pin (maximum rate = f
P89LV51RB2/RC2/RD2
CAPNn
CCF4
4
4
8-bit microcontrollers with 80C51 core
osc
osc
CCF3
MATn
/ 6
/ 2
3
3
CCF2
‘0’
TOGn
2
2
by user programs.
© NXP B.V. 2009. All rights reserved.
PWMn
CCF1
1
1
ECCFn
osc
CCF0
49 of 76
0
0
/ 4)