C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 17

IC 8051 MCU FLASH 16K 28QFN

C8051F327-GM

Manufacturer Part Number
C8051F327-GM
Description
IC 8051 MCU FLASH 16K 28QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F327-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART, USB
Peripherals
POR
Number Of I /o
15
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
15
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F326DK
Minimum Operating Temperature
- 40 C
Package
28QFN EP
Device Core
8051
Family Name
C8051F327
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1297-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F327-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
1.1.
1.1.1. Fully 8051 Compatible
The C8051F326/7 family utilizes Silicon Laboratories' proprietary CIP-51 microcontroller core. The CIP-51
is fully compatible with the MCS-51™ instruction set; standard 803x/805x assemblers and compilers can
be used to develop software. The CIP-51 core offers all the peripherals included with a standard 8052,
including two 16-bit counter/timers, a full-duplex UART with extended baud rate configuration, 1536 bytes
of on-chip RAM, 128 byte Special Function Register (SFR) address space, and 15 I/O pins.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the stan-
dard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system
clock cycles to execute with a maximum system clock of 12-to-24 MHz. By contrast, the CIP-51 core exe-
cutes 70% of its instructions in one or two system clock cycles, with only four instructions taking more than
four system clock cycles.
The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that
require each execution time.
With the CIP-51's maximum system clock at 25 MHz, it has a peak throughput of 25 MIPS. Figure 1.5
shows a comparison of peak throughputs for various 8-bit microcontroller cores with their maximum sys-
tem clocks.
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller Core
Figure 1.5. Comparison of Peak MCU Execution Speeds
25
20
15
10
5
26
(25 MHz clk)
Silicon Labs
1
CIP-51
50
2
(33 MHz clk)
PIC17C75x
Microchip
2/3
Rev. 1.1
5
14
3
(33 MHz clk)
Philips
80C51
3/4
7
(16 MHz clk)
4
3
ADuC812
8051
C8051F326/7
4/5
1
5
2
8
1
17

Related parts for C8051F327-GM