C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 30

• Manufacturer Part Number: C8051F327-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F327-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F326DK
• Minimum Operating Temperature: - 40 C
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F327
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1297-5

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Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
5. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
6. The stencil thickness should be 0.125mm (5 mils).
7. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins.
8. A 3x3 array of 0.90mm openings on a 1.1mm pitch should be used for the center pad to
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for
C1
C2
X1
E
mask and the metal pad is to be 60μm minimum, all the way around the pad.
to assure good solder paste release.
assure the proper paste volume (67% Paste Coverage).
Small Body Components.
Figure 4.4. QFN-28 Recommended PCB Land Pattern
Table 4.3. QFN-28 PCB Land Pattern Dimensions
0.20
Min
4.80
4.80
0.50
Max
0.30
Rev. 1.1
Dimension
X2
Y1
Y2
3.20
0.85
3.20
Min
Max
3.30
0.95
3.30