C8051F327-GM Silicon Laboratories Inc, C8051F327-GM Datasheet - Page 41

• Manufacturer Part Number: C8051F327-GM
• Description: IC 8051 MCU FLASH 16K 28QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F327-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: UART/USART, USB
• Peripherals: POR
• Number Of I /o: 15
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F326DK
• Minimum Operating Temperature: - 40 C
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F327
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1481 - DAUGHTER CARD TOOLSTCK C8051F327770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1297-5

6.2.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The CIP-51 memory organization is
shown in Figure 6.2.
6.2.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F326/7 implements 16k kB of this pro-
gram memory space as in-system, re-programmable Flash memory, organized in a contiguous block from
addresses 0x0000 to 0x3FFF. Addresses above 0x3DFF are reserved.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature pro-
vides a mechanism for the CIP-51 to update program code and use the program memory space for non-
volatile data storage. Refer to Section “8. Flash Memory” on page 63 for further details.
Memory Organization
0x3DFF
0x3FFF
0x3E00
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Byte Sectors)
RESERVED
16K FLASH
(In-System
(FLASH)
Figure 6.2. Memory Map
0xFFFF
0x03FF
0x0400
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
0x0000 to 0x03FF, wrapped
XRAM - 1024 Bytes
Same 1024 bytes as from
(accessable using MOVX
on 1K-byte boundaries
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
USB Registers Only
Accessible through
C8051F326/7
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
USB FIFOs
256 Bytes
Register's
41