MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 164

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08JM60CGT

Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM60CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
11.2
This section describes each user-accessible pin signal.
11.2.1
The bidirectional SCL is the serial clock line of the IIC system.
11.2.2
The bidirectional SDA is the serial data line of the IIC system.
11.3
This section consists of the IIC register descriptions in address order.
Refer to the direct-page register summary in the
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
164
External Signal Description
Register Definition
SCL — Serial Clock Line
SDA — Serial Data Line
CTRL_REG
ADDR_DECODE
Control
Address
Clock
Input
Sync
Figure 11-2. IIC Functional Block Diagram
FREQ_REG
MC9S08JM60 Series Data Sheet, Rev. 3
SCL
Arbitration
ADDR_REG
Control
memory
Start
Stop
SDA
chapter of this document for the absolute address
STATUS_REG
Interrupt
Compare
Register
Address
In/Out
Data
Shift
DATA_MUX
DATA_REG
Data Bus
Freescale Semiconductor

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