MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 325

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08JM60CGT

Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM60CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
17.4.8
Interrupts from the INTSTAT register signify events which occur during normal operation
frame tokens (TOKSOF), packet completion (TOKDNE), USB bus reset (USBRST), endpoint errors
(ERROR), suspend and resume (SLEEP and RESUME), and endpoint stalled (STALL).
The ERRSTAT interrupts carry information about specific types of errors, which is needed on an
application specific basis. Using ERRSTAT, an application can determine exactly why a packet transfer
failed
Both registers are maskable via the INTENB and ERRENB registers. The INTSTAT and ERRSTAT are
used to signal interrupts in a two-level structure. Unmasked interrupts from the ERRSTAT register are
reported in the INTSTAT register.
Note that the interrupt registers work in concert with the STAT register. On receipt of an INTSTAT
interrupt, software can check the STAT register and determine which BDT entry was affected by the
transaction.
Freescale Semiconductor
USB transceiver disabled
USBDP pullup disabled
Endpoints disabled
USB address register set to zero
due to CRC error, PID check error and so on.
Interrupts
MC9S08JM60 Series Data Sheet, Rev. 3
Universal Serial Bus Device Controller (S08USBV1)
USB start of
325

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