MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 245
![IC MCU 8BIT 60K FLASH 48-QFN](/photos/12/17/121757/mc9s08jm60cgt_sml.jpg)
MC9S08JM60CGT
Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08JM32CLD.pdf
(388 pages)
Specifications of MC9S08JM60CGT
Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Write:
Write:
Write:
Write:
Write:
Write:
After SPI master initiates transfer by checking that SPTEF = 1 and then writing data to SPIDH/L:
Data transmissions can be 8- or 16-bits long, and mode fault detection can be enabled for master mode in cases where
more than one SPI device might become a master at the same time. Also, some applications may utilize the receive data
buffer hardware match feature to trigger specific actions, such as when command data can be sent through the SPI or to
indicate the end of an SPI transmission.
Write:
Wait for SPRF, then read from SPIDH/L
Wait for SPTEF, then write to SPIDH/L
SPIxMH
SPIxDH
SPIxBR
SPIxML
SPIxC1
SPIxC2
SPIxDL
SPIxS
SPIxC1
SPIxC2
SPIxMH:SPIxML
SPIxC1
SPIxC2
SPIxBR
SPIxMH:SPIxML
Hardware Match Value
Module/interrupt enables and configuration
Additional configuration options.
Baud rate = (BUSCLK/SPPR[2:0])/SPR2[2:0]
SPRF
SPIE
SPMIE
Bit 15
Bit 15
Bit 7
Bit 7
SPIMODE
SPPR2
SPE
SPMF
Bit 14
Bit 14
Bit 6
Bit 6
Figure 15-2. SPI Module Quick Start
MC9S08JM60 Series Data Sheet, Rev. 3
to configure
to configure
to set
to configure
to set
to configure
to set
Module Initialization
Module Initialization (Slave):
SPTIE
SPTEF
SPPR1
Bit 13
Bit 13
Bit 5
Bit 5
Module Use:
MODFEN
MODF
MSTR
SPPR0
Bit 12
Bit 12
Bit 4
Bit 4
interrupts, set primary SPI options, slave mode select, and
system enable.
optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
interrupts, set primary SPI options, master mode select,
and system enable.
optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
baud rate
hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
BIDIROE
CPOL
(Master):
Bit 11
Bit 11
Bit 3
Bit 3
CPHA
SPR2
Bit 10
Bit 10
Bit 2
Bit 2
Serial Peripheral Interface (S08SPI16V1)
SPISWAI
SSOE
SPR1
Bit 9
Bit 1
Bit 9
Bit 1
SPC0
SPR0
LSBFE
Bit 0
Bit 8
Bit 8
Bit 0
245
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