MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 285

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.2
The IICV2 module has two external pins.
10.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
10.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
10.3
This section provides a detailed description of all memory and registers for the IIC module.
10.3.1
The memory map for the IIC module is given below in
the address offset.The total address for each register is the sum of the base address for the IIC module and
the address offset for each register.
Freescale Semiconductor
External Signal Description
Memory Map and Register Definition
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Module Memory Map
MC9S12NE64 Data Sheet, Rev. 1.1
Figure
10-2. The address listed for each register is
External Signal Description
285