MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 400

IC MCU 25MHZ ETHERNET/PHY 80TQFP

MC9S12NE64VTU

Manufacturer Part Number
MC9S12NE64VTU
Description
IC MCU 25MHZ ETHERNET/PHY 80TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTU

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 15 Multiplexed External Bus Interface (MEBIV3)
15.3.1
15.3.2
15.3.2.1
400
Emulation Narrow with
IVIS, and Peripheral
Expanded Narrow AB15 and
Expanded Wide,
Address
0x00032
0x00033
0x000A
0x000B
0x000C
0x000D
0x000E
0x001E
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000F
Offset
Single Chip
Module Memory Map
Register Descriptions
Port A Data Register (PORTA)
Reset
W
R
Port A Data Register (PORTA)
Port B Data Register (PORTB)
Data Direction Register A (DDRA)
Data Direction Register B (DDRB)
Reserved
Reserved
Reserved
Reserved
Port E Data Register (PORTE)
Data Direction Register E (DDRE)
Port E Assignment Register (PEAR)
Mode Register (MODE)
Pull Control Register (PUCR)
Reduced Drive Register (RDRIV)
External Bus Interface Control Register (EBICTL)
Reserved
IRQ Control Register (IRQCR)
Port K Data Register (PORTK)
Data Direction Register K (DDRK)
DB15/DB7
AB/DB15
Bit 7
PA7
0
7
Figure 15-2. Port A Data Register (PORTA)
DB14/DB6
AB14 and
AB/DB14
PA6
6
0
6
MC9S12NE64 Data Sheet, Rev. 1.1
Table 15-2. MEBI Memory Map
DB13/DB5
AB13 and
AB/DB13
PA5
5
0
5
Use
DB12/DB4
AB12 and
AB/DB12
PA4
4
4
0
DB11/DB3
AB11 and
AB/DB11
PA3
3
0
3
DB10/DB2
AB10 and
AB/DB10
PA2
2
0
2
Freescale Semiconductor
DB9/DB1
AB9 and
AB/DB9
PA1
Access
1
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
DB8/DB0
AB8 and
AB/DB8
Bit 0
PA0
0
0

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