MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 520

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Appendix A Electrical Characteristics
And finally the frequency relationship is defined as:
With the above values the resistance can be calculated. The example is shown for a loop bandwidth
f
The capacitance C
The capacitance C
A.12.3.1.1 Jitter Information
The basic functionality of the PLL is shown in Figure 18-22. With each transition of the clock f
deviation from the reference clock f
The adjustment is done continuously with no abrupt changes in the clock output frequency. Noise, voltage,
temperature, and other factors cause slight variations in the control loop resulting in a clock jitter. This
jitter affects the real minimum and maximum clock periods as illustrated in Figure 18-23.
520
C
= 10 kHz:
0
t
min1
t
R
nom
t
max1
=
C
2 π n f
---------------------------- -
s
p
s
can now be calculated as:
should be chosen in the range of:
1
⋅ ⋅
=
K
n
Φ
--------------------- -
π f
2 ζ
⋅
C
=
⋅
⋅
C
s
C
f
------------ -
VCO
⁄
f
⋅
2
20
ref
R
= 2*π*50*10kHz/(316.7Hz/Ω)=9.9kΩ=~10kΩ
2
ref
≈
≤
MC9S12NE64 Data Sheet, Rev. 1.1
Figure 18-23. Jitter Definitions
is measured and input voltage to the VCO is adjusted accordingly.
=
0.516
-------------- - ζ
f
C
C
p
2
⋅
t
≤
minN
R
⋅
t
maxN
(
C
;
synr
(
s
3
⁄
=
10
0.9
+
1
)
)
C
p
= 5.19nF =~ 4.7nF
= 470pF
= 50
N-1
Freescale Semiconductor
N
cmp
, the