M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 341

• Manufacturer Part Number: M30853FJGP#U3
• Description: IC M32C MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30853FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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Chapter 6
Figure 6.1.1. When executing a register transfer instruction starting from an even address
1 .
0
9
0 .
B
Content at jump address is
prefetched at the same time the
instruction queue buffer is cleared.
0
0
3
1
2
9
0
0 -
0
Address bus
Fetch code
Instructions
under execution
6
BCLK
Data bus(H)
Data bus(L)
1
WR
RD
0 .
Instruction
queue buffer
0
0
5
3 .
(Program area: 16-bit bus without wait state; Data area: 16-bit bus without wait state)
Calculation number of cycles
1
Sample program
Address
FFC024
FFC024
FFC025
FFC026
FFC027
FFC028
FFC029
FFC02A
FFC02B
FFC02C
FFC02C
FFC02E
FFC02F
FFC030
FFC031
FFC032
FFC033
FFC034
FFC035
FFC036
p
a
g
e
323
P : Indicates a prefetch (reading from memory into the instruction queue buffer).
Jump address
FFC02A FFC02C FFC02E FFC030 FFC032 FFC036 FFC038
: Indicates the locations of the instruction queue buffer that are cleared.
Code
7A
DE
DE
DE
DE
DE
DE
DE
C9EB
7A
DE
DE
DE
DE
DE
DE
DE
7A
DE
DE
DE
DE
DE
DE
DE
f o
TEST_10:
TEST_11:
TEST_12:
JMP TEST_11
3
DE
DE
P
3
5
EB
C9
JMP
Instruction
NOP
NOP
NOP
NOP
NOP
NOP
NOP
MOV.W:G
JMP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
EB
C9
P
Fetch
TEST_11
TEST_12
DE
C9
EB
7A
DE
7A
P
R0,R1
MOV.W
C9EB
DE
DE
DE
7A
DE
DE
P
Fetch
7A
DE
DE
DE
DE
DE
JMP TEST_12
DE
DE
P
C9
EB
EB
C9
P
Content at jump address is
prefetched at the same time the
instruction queue buffer is cleared.
EB
BB
C9
FF
BB
FF
P
6.1 Instruction queue buffer