M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 92

IC M32C MCU FLASH 100LQFP

M30853FJGP#U3

Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30853FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
e
E
DADD
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
[ Description Example ]
v
J
Chapter 3
1 .
Change
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
#IMM8/#IMM16
Conditions
0
9
DADD.size
dest
Flag
0 .
B
• This instruction adds
• When (.W) is specified for the size specifier (.size) and
S :
Z :
C :
DADD.B
DADD.W
DADD.W
0
0
bits become 0. Also, when
are the data to be operated on.
3
1
2
9
0
0 -
0
U
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
The flag is set when the operation resulted in exceeding +9999 (.W) or +99 (.B); otherwise
cleared.
6
1
0 .
0
src
0
5
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
3 .
I
Functions
1
src,dest
#3,R0L
R1,R0
[A0],[A1]
+
O
p
a
g
dest
e
B
src
74
dest
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
S
f o
and
3
Z
src
3
5
src
is the address register, the 16 low-order bits of the address register
D
Decimal add without carry
together in decimal and stores the result in
C
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
Decimal ADDition
B , W
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
dest
is the address register, the 8 high-order
[ Instruction Code/Number of Cycles ]
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
dest
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
dest
.
3.2 Functions
DADD
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
Page= 208

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