Z16F2810VH20EG Zilog, Z16F2810VH20EG Datasheet - Page 262

• Manufacturer Part Number: Z16F2810VH20EG
• Description: IC ZNEO MCU FLASH 128K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810VH20EG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 68-LCC (J-Lead)
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4691-5; Z16F2810VH20EG

ADC Control Register Definitions
PS022008-0810
ADC Interrupts
ADC0 Timer0 Capture
ADC Convert on Read
Reference Buffer, RBUF
Internal Voltage Reference Generator
The ADC generates an interrupt request when a conversion has been completed. 
An interrupt request pending when the ADC is disabled is not automatically cleared.
The Timer0 count is captured for every ADC0 conversion. The information is used to
determine the zero crossing of back EMF in motor control applications. The capture of the
Timer0 count occurs when the programmed sample time is complete for every conversion
and stored in the ADC timer capture register (ADCTCAP).
The ADC is set up to automatically convert the next channel input after reading the results
of the current conversion. The conversions continue up to the channel listed in the
ADC0MAX register and then start over at the initial channel. The initial channel to con-
vert is written to the control register, ADC0CTL, prior to starting the convert on Read
process. Once started, the conversions continue to loop from the initial channel to Max
channel until the convert on Read bit,
data registers.
The reference buffer, RBUF, supplies the reference voltage for the ADC. When enabled,
the internal voltage reference generator supplies the ADC and the voltage is available on
the VREF pin. When RBUF is disabled, the reference voltage must be supplied externally
through the VREF pin. RBUF is controlled by the REFEN bit in the ADC0 control register.
The internal voltage reference generator provides the voltage to RBUF. The internal
reference voltage is 2 V.
The following sections describe the control registers for the ADC.
P R E L I M I N A R Y
CVTRD0
, is cleared or the data is not read from the
Product Specification
ZNEO
Analog Functions
Z16F Series
246