AT90PWM3B-16SUR Atmel, AT90PWM3B-16SUR Datasheet - Page 18
![MCU AVR 8K FLASH 16MHA 32SOIC](/photos/7/29/72992/313-32-soic_sml.jpg)
AT90PWM3B-16SUR
Manufacturer Part Number
AT90PWM3B-16SUR
Description
MCU AVR 8K FLASH 16MHA 32SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM3B-16SUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6. Memories
6.1
6.2
18
In-System Reprogrammable Flash Program Memory
SRAM Data Memory
AT90PWM2/3/2B/3B
This section describes the different memories in the AT90PWM2/2B/3/3B. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the AT90PWM2/2B/3/3B features an EEPROM Memory for data storage. All three memory
spaces are linear and regular.
The AT90PWM2/2B/3/3B contains 8K bytes On-chip In-System Reprogrammable Flash memory
for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
4K x 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
AT90PWM2/2B/3/3B Program Counter (PC) is 12 bits wide, thus addressing the 4K program
memory locations. The operation of Boot Program section and associated Boot Lock bits for
software protection are described in detail in
gramming” on page
on Flash programming in SPI or Parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 1. Program Memory Map
Figure 2
shows how the AT90PWM2/2B/3/3B SRAM Memory is organized.
14.
264.
“Memory Programming” on page 278
Application Flash Section
Boot Flash Section
Program Memory
“Boot Loader Support – Read-While-Write Self-Pro-
contains a detailed description
0x0000
0x0FFF
“Instruction Execution Tim-
4317J–AVR–08/10
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