AT90PWM3B-16SUR Atmel, AT90PWM3B-16SUR Datasheet - Page 278
![MCU AVR 8K FLASH 16MHA 32SOIC](/photos/7/29/72992/313-32-soic_sml.jpg)
AT90PWM3B-16SUR
Manufacturer Part Number
AT90PWM3B-16SUR
Description
MCU AVR 8K FLASH 16MHA 32SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM3B-16SUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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25. Memory Programming
25.1
278
Program And Data Memory Lock Bits
AT90PWM2/3/2B/3B
For details about these two section, see
and
Table 24-8.
Note:
The AT90PWM2/2B/3/3B provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in
erased to “1” with the Chip Erase command.
Table 25-1.
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
BLB12
BLB11
BLB02
BLB01
LB2
LB1
“RWW – Read-While-Write Section” on page 266
Lock Bit Byte
1. Z15:Z13: always ignored
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
Explanation of Different Variables used in
pointer
Lock Bit Byte
“Addressing the Flash During Self-Programming” on page 271
PC[11:5]
PC[4:0]
11
4
(1)
Corresponding
Bit No
Z-value
7
6
5
4
3
2
1
0
Z12:Z6
Z5:Z1
Z12
Z5
(1)
“NRWW – No Read-While-Write Section” on page 266
Description
–
–
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
Description
Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
Most significant bit which is used to address the
words within one page (32 words in a page requires
5 bits PC [4:0]).
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
Program counter page address: Page select, for
page erase and page write
Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
Figure 24-3
Table
25-2. The Lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
and the Mapping to the Z-
for details about the use of
4317J–AVR–08/10
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