AT90PWM3B-16SUR Atmel, AT90PWM3B-16SUR Datasheet - Page 206

• Manufacturer Part Number: AT90PWM3B-16SUR
• Description: MCU AVR 8K FLASH 16MHA 32SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.10.5
18.11 Examples of Baud Rate Setting
206
AT90PWM2/3/2B/3B
USART Baud Rate Registers – UBRRL and UBRRH
This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is
used. The UCPOL bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCK).
Table 18-8.
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRH is written.
• Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four
most significant bits, and the UBRRL contains the eight least significant bits of the USART baud
rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is
changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.
For standard crystal, resonator and external oscillator frequencies, the most commonly used
baud rates for asynchronous operation can be generated by using the UBRR settings in
18-9
from the target baud rate, are bold in the table. Higher error ratings are acceptable, but the
Receiver will have less noise resistance when the error ratings are high, especially for large
serial frames (see
lated using the following equation:
Bit
Read/Write
Initial Value
UCPOL
up to
0
1
Table
UCPOL Bit Settings
Transmitted Data Changed
(Output of TxDn Pin)
Rising XCK Edge
Falling XCK Edge
R/W
15
R
–
7
0
0
18-12. UBRR values which yield an actual baud rate differing less than 0.5%
“Asynchronous Operational Range” on page
R/W
14
R
–
6
0
0
R/W
Error[%]
13
R
–
5
0
0
R/W
=
12
R
–
4
0
0
UBRR[7:0]
⎛
⎝
1
–
BaudRate
------------------------------------------------------- -
R/W
R/W
11
3
0
0
BaudRate
Received Data Sampled
(Input on RxD Pin)
Falling XCK Edge
Rising XCK Edge
Closest Match
R/W
R/W
10
2
0
0
UBRR[11:8]
199). The error values are calcu-
⎞
⎠
•
R/W
R/W
9
1
0
0
100%
R/W
R/W
8
0
0
0
4317J–AVR–08/10
UBRRH
UBRRL
Table