AT90PWM3B-16SUR Atmel, AT90PWM3B-16SUR Datasheet - Page 260
![MCU AVR 8K FLASH 16MHA 32SOIC](/photos/7/29/72992/313-32-soic_sml.jpg)
AT90PWM3B-16SUR
Manufacturer Part Number
AT90PWM3B-16SUR
Description
MCU AVR 8K FLASH 16MHA 32SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM3B-16SUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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22.3.1
22.4
22.4.1
260
DAC Register Description
AT90PWM2/3/2B/3B
DAC Voltage Reference
Digital to Analog Conversion Control Register – DACON
rupt Enable bit in SREG is cleared. A conversion can thus be triggered without causing an
interrupt. However, the interrupt flag must be cleared in order to trigger a new conversion at the
next interrupt event.
The reference voltage for the ADC (V
be selected as either AV
AV
ated from the internal bandgap reference (V
external AREF pin is directly connected to the DAC, and the reference voltage can be made
more immune to noise by connecting a capacitor between the AREF pin and ground. V
also be measured at the AREF pin with a high impedant voltmeter. Note that V
impedant source, and only a capacitive load should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other
reference voltage options in the application, as they will be shorted to the external voltage. If no
external voltage is applied to the AREF pin, the user may switch between AV
reference selection. The first DAC conversion result after switching reference voltage source
may be inaccurate, and the user is advised to discard this result.
The DAC is controlled via three dedicated registers:
•
•
• Bit 7 – DAATE: DAC Auto Trigger Enable bit
Set this bit to update the DAC input value on the positive edge of the trigger signal selected with
the DACTS2-0 bit in DACON register.
Clear it to automatically update the DAC input when a value is written on DACH register.
• Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE
bit is set.
In accordance with the
update of the DAC input values. The update will be generated by the rising edge of the selected
interrupt flag whether the interrupt is enabled or not.
Table 22-1.
Bit
Read/Write
Initial Value
DATS2
0
0
0
0
CC
The DACON register which is used for DAC configuration
DACH and DACL which are used to set the value to be converted.
is connected to the DAC through a passive switch. The internal 2.56V reference is gener-
DATS1
0
0
1
1
DAC Auto Trigger source selection
DAATE
R/W
7
0
Table
CC
DATS2
R/W
DATS0
0
1
0
1
6
0
, internal 2.56V reference, or external AREF pin.
22-1, these 3 bits select the interrupt event which will generate the
DATS1
R/W
5
0
REF
Description
Analog comparator 0
Analog comparator 1
External Interrupt Request 0
Timer/Counter0 Compare Match
) indicates the conversion range for the DAC. V
DATS0
R/W
BG
4
0
) through an internal amplifier. In either case, the
3
0
-
-
DALA
R/W
2
0
DAOE
R/W
1
0
DAEN
CC
R/W
0
0
and 2.56V as
4317J–AVR–08/10
REF
DACON
is a high
REF
REF
can
can
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