PIC18F26K20-E/ML Microchip Technology, PIC18F26K20-E/ML Datasheet - Page 170

IC PIC MCU FLASH 32KX16 28QFN

PIC18F26K20-E/ML

Manufacturer Part Number
PIC18F26K20-E/ML
Description
IC PIC MCU FLASH 32KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/ML

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.84375KB
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
 Details
PIC18F2XK20/4XK20
15.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
FIGURE 15-1:
DS41303E-page 168
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer3 Operation
T1OSI
CCP1/CCP2 Select from T3CON<6,3>
CCP1/CCP2 Special Event Trigger
Timer1 Oscillator
TIMER3 BLOCK DIAGRAM
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
(1)
TMR3CS
Internal
Clock
F
OSC
/4
Preliminary
1
0
Timer1 Clock Input
Clear TMR3
Prescaler
1, 2, 4, 8
The operating mode is determined by the clock select
bit, TMR3CS of the T3CON register. When TMR3CS is
cleared (= 0), Timer3 increments on every internal
instruction cycle (F
increments on every rising edge of the Timer1 external
clock input or the Timer1 oscillator, if enabled.
As with Timer1, the digital circuitry associated with the
RC1/T1OSI and RC0/T1OSO/T13CKI pins is disabled
when the Timer1 oscillator is enabled. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
2
TMR3L
Sleep Input
Synchronize
OSC
Detect
High Byte
/4). When the bit is set, Timer3
TMR3
© 2009 Microchip Technology Inc.
1
0
on Overflow
TMR3IF
Set
Timer3
On/Off

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