PIC18F26K20-E/ML Microchip Technology, PIC18F26K20-E/ML Datasheet - Page 266

• Manufacturer Part Number: PIC18F26K20-E/ML
• Description: IC PIC MCU FLASH 32KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.84375KB
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
19.2
19.2.1
To enable the ADC module, the ADON bit of the
ADCON0 register must be set to a ‘1’. Setting the GO/
DONE bit of the ADCON0 register to a ‘1’ will, depend-
ing on the ACQT bits of the ADCON2 register, either
immediately start the Analog-to-Digital conversion or
start an acquisition delay followed by the Analog-to-
Digital conversion.
FIGURE 19-3:
FIGURE 19-4:
DS41303E-page 264
(Holding capacitor continues
acquiring input)
Set GO bit
1
T
CY
Set GO bit
T
ADC Operation
Holding capacitor is disconnected from analog input (typically 100 ns)
ACQT
Acquisition
Automatic
- T
STARTING A CONVERSION
2
Time
AD
Conversion starts
Cycles
T
AD
3
1 T
A/D CONVERSION T
A/D CONVERSION T
AD
b9
4
2 T
(Holding capacitor is disconnected from analog input)
Conversion starts
AD
b8
1
3 T
b9
AD
2
b7
4 T
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
AD
b8
3
b6
AD
AD
5 T
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
CYCLES (A
CYCLES (A
Preliminary
AD
b5
b7
4
6 T
T
AD
b4
5
b6
AD
7 T
Cycles
Figure 19-3 shows the operation of the A/D converter
after the GO bit has been set and the ACQT<2:0> bits
are cleared. A conversion is started after the following
instruction to allow entry into SLEEP mode before the
conversion begins.
Figure 19-4 shows the operation of the A/D converter
after the GO bit has been set and the ACQT<2:0> bits
are set to ‘010’ which selects a 4 T
before the conversion starts.
CQT
AD
CQT
b3
b5
Note:
6
8
<2:0> = 000, T
<2:0> = 010, T
T
AD
b4
b2
7
9 T
The GO/DONE bit should not be set in the
same instruction that turns on the ADC.
Refer to Section 19.2.9 “A/D Conver-
sion Procedure”.
AD
b3
8
b1
10
T
AD
ACQ
b0
b2
9
ACQ
© 2009 Microchip Technology Inc.
11
2 T
= 0)
10
= 4 T
Discharge
b1
AD
AD
AD
b0
11
)
acquisition time
2 T
Discharge
AD