PIC18F26K20-E/ML Microchip Technology, PIC18F26K20-E/ML Datasheet - Page 206

• Manufacturer Part Number: PIC18F26K20-E/ML
• Description: IC PIC MCU FLASH 32KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.84375KB
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
REGISTER 17-6:
DS41303E-page 204
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
GCEN
R/W-0
2:
For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I
be set (no spooling) and the SSPBUF may not be written (or writes to the SSPBUF are disabled).
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
GCEN: General Call Enable bit (Slave mode only)
1 = Generate interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (Master Receive mode only)
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (Master Receive mode only)
1 = Initiate Acknowledge sequence on SDA and SCL pins and transmit ACKDT data bit.
0 = Acknowledge sequence Idle
RCEN: Receive Enable bit (Master mode only)
1 = Enables Receive mode for I
0 = Receive Idle
PEN: Stop Condition Enable bit (Master mode only)
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition Idle
RSEN: Repeated Start Condition Enable bit (Master mode only)
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition Idle
SEN: Start Condition Enable/Stretch Enable bit
In Master mode:
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition Idle
In Slave mode:
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled for slave received. Slave trasmit clock strething remains enabled.
ACKSTAT
R/W-0
Automatically cleared by hardware.
SSPCON2: MSSP CONTROL REGISTER (I
W = Writable bit
‘1’ = Bit is set
ACKDT
R/W-0
(2)
ACKEN
2
R/W-0
C
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RCEN
2
R/W-0
(1)
(1)
C module is not in the Idle mode, these bits may not
(1)
(1)
2
C MODE)
(2)
PEN
R/W-0
(1)
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
(1)
RSEN
R/W-0
(1)
SEN
R/W-0
(1)
bit 0