PIC18F26K20-E/ML Microchip Technology, PIC18F26K20-E/ML Datasheet - Page 286

• Manufacturer Part Number: PIC18F26K20-E/ML
• Description: IC PIC MCU FLASH 32KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.84375KB
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Details

PIC18F2XK20/4XK20
TABLE 20-2:
DS41303E-page 284
CM1CON0
CM2CON0
CM2CON1
CVRCON
CVRCON2
INTCON
PIR2
PIE2
IPR2
PORTA
LATA
TRISA
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
Note 1:
Name
PORTA<7:6> and their direction and latch bits are individually configured as port pins based on various
primary oscillator modes. When disabled, these bits read as ‘0’.
GIE/GIEH PEIE/GIEL TMR0IE
TRISA7
MC1OUT
LATA7
OSCFIF
OSCFIE
OSCFIP
CVREN
FVREN
RA7
C1ON
C2ON
Bit 7
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
(1)
(1)
(1)
TRISA6
MC2OUT
LATA6
CVROE
C1OUT
C2OUT
FVRST
RA6
Bit 6
C1IF
C1IE
C1IP
(1)
(1)
(1)
PORTA Data Latch Register (Read and Write to Data Latch)
PORTA Data Direction Control Register
C1RSEL
CVRR
C1OE
C2OE
C2IE
C2IP
Bit 5
C2IF
RA5
—
Preliminary
C2RSEL
CVRSS
C1POL
C2POL
INT0IE
EEIE
EEIP
Bit 4
EEIF
RA4
—
BCLIE
BCLIP
BCLIF
C1SP
C2SP
CVR3
RBIE
Bit 3
RA3
—
—
TMR0IF
HLVDIF
HLVDIE
HLVDIP
CVR2
Bit 2
C1R
C2R
RA2
—
—
TMR3IE
TMR3IP
TMR3IF
C1CH1
C2CH1
INT0IF
CVR1
© 2009 Microchip Technology Inc.
Bit 1
RA1
—
—
CCP2IF
CCP2IE
CCP2IP
C1CH0
C2CH0
CVR0
RBIF
Bit 0
RA0
—
—
on page
Values
Reset
60
60
61
59
59
57
60
60
60
60
60
60