ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 186

IC AVR MCU 8K 8MHZ 3V 28DIP

ATMEGA8L-8PU

Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Analog
Comparator
Special Function IO
Register – SFIOR
Analog Comparator
Control and Status
Register – ACSR
186
ATmega8(L)
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator Output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
Figure 89. Analog Comparator Block Diagram
Notes:
• Bit 3 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC MULTIPLEXER
REFERENCE
ACME
ADEN
BANDGAP
1. See
2. Refer to
Figure
OUTPUT
placement
R
7
0
ACD
R/W
Table 72 on page 188
7
0
89.
ACBG
(1)
“Pin Configurations” on page 2
ACBG
R/W
R
6
0
6
0
“Analog Comparator Multiplexed Input” on page
ACO
N/A
R
R
5
5
0
R/W
ACI
4
0
R
4
0
(2)
ACIE
R/W
and
ACME
3
0
R/W
3
0
Table 28 on page 63
ACIC
R/W
2
0
PUD
R/W
2
0
ACIS1
R/W
PSR2
1
0
R/W
1
0
ACIS0
for Analog Comparator pin
PSR10
R/W
R/W
0
0
0
0
188.
ACSR
SFIOR
2486Z–AVR–02/11

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