ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 48

IC AVR MCU 8K 8MHZ 3V 28DIP

ATMEGA8L-8PU

Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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48
ATmega8(L)
When the BOOTRST Fuse is unprogrammed, the boot section size set to 2Kbytes and the
IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical and
general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed and the boot section size set to 2Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
AddressLabels Code
$000
;
$001
$002
$003
$004
$005
$006
;
.org $c01
$c01
$c02
...
$c12
AddressLabels Code
.org $001
$001
$002
...
$012
;
.org $c00
$c00
;
$c01
$c02
$c03
$c04
$c05
$c06
RESET:ldi
RESET:ldi
rjmp
out
ldi
out
sei
<instr>
rjmp
rjmp
...
rjmp
rjmp
rjmp
...
rjmp
rjmp
out
ldi
out
sei
<instr>
RESET
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
EXT_INT0
EXT_INT1
... ;
SPM_RDY
EXT_INT0
EXT_INT1
...
SPM_RDY
RESET
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
; Enable interrupts
; IRQ0 Handler
; IRQ1 Handler
; Store Program Memory Ready Handler
Comments
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; Reset handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; Set Stack Pointer to top of RAM
2486Z–AVR–02/11

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