AT32UC3B0256-A2UR Atmel, AT32UC3B0256-A2UR Datasheet - Page 172

• Manufacturer Part Number: AT32UC3B0256-A2UR
• Description: MCU AVR32 256K FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0256-A2UR

• Package / Case: 64-TQFP, 64-VQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Package: 64TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 44
• Interface Type: I2S/SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.4.1
17.4.2
17.4.3
17.5
32059K–03/2011
Functional Description
Module Configuration
Clocks
Interrupts
Most of the features of the GPIO are configurable for each product. The user must refer to the
Package and Pinout chapter for these settings.
Product specific settings includes:
The clock for the GPIO bus interface (CLK_GPIO) is generated by the Power Manager. This
clock is enabled at reset, and can be disabled in the Power Manager.
The CLK_GPIO must be enabled in order to access the configuration registers of the GPIO or to
use the GPIO interrupts. After configuring the GPIO, the CLK_GPIO can be disabled if interrupts
are not used.
The GPIO interrupt lines are connected to the interrupt controller. Using the GPIO interrupt
requires the interrupt controller to be configured first.
The GPIO controls the I/O lines of the microcontroller. The control logic associated with each pin
is represented in the figure below:
• Number of I/O pins.
• Functions implemented on each pin
• Peripheral function(s) multiplexed on each I/O pin
• Reset value of registers
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