AT32UC3B0256-A2UR Atmel, AT32UC3B0256-A2UR Datasheet - Page 301

• Manufacturer Part Number: AT32UC3B0256-A2UR
• Description: MCU AVR32 256K FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0256-A2UR

• Package / Case: 64-TQFP, 64-VQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Package: 64TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 44
• Interface Type: I2S/SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.6
21.6.1
32059K–03/2011
Functional Description
Baud Rate Generator
The USART is capable of managing several types of serial synchronous or asynchronous
communications.
It supports the following communication modes:
•
The Baud Rate Generator provides the bit period clock named the Baud Rate Clock to both the
receiver and the transmitter.
The Baud Rate Generator clock source can be selected by setting the USCLKS field in the Mode
Register (MR) between:
• 5- to 9-bit full-duplex asynchronous serial communication
• High-speed 5- to 9-bit full-duplex synchronous serial communication
• RS485 with driver control signal
• ISO7816, T0 or T1 protocols for interfacing with smart cards
• InfraRed IrDA Modulation and Demodulation
• Test modes
• CLK_USART
• a division of CLK_USART, the divider being product dependent, but generally set to 8
• the external clock, available on the CLK pin
SPI Mode
– Master or Slave
– Serial Clock Programmable Phase and Polarity
– SPI Serial Clock (CLK) Frequency up to Internal Clock Frequency CLK_USART/4
– MSB- or LSB-first
– 1, 1.5 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling receiver frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multidrop serial communication
– MSB- or LSB-first
– 1 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multidrop serial communication
– NACK handling, error counter with repetition and iteration limit
– Remote loopback, local loopback, automatic echo
AT32UC3B
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