AT32UC3B0256-A2UR Atmel, AT32UC3B0256-A2UR Datasheet - Page 314
![MCU AVR32 256K FLASH 64-TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0256-A2UR
Manufacturer Part Number
AT32UC3B0256-A2UR
Description
MCU AVR32 256K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B1512-Z1UT.pdf
(692 pages)
Specifications of AT32UC3B0256-A2UR
Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Package
64TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
44
Interface Type
I2S/SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Figure 21-17. ASK Modulator Output
Figure 21-18. FSK Modulator Output
21.6.3.6
32059K–03/2011
Uptstream Frequency F0
Uptstream Frequencies
unipolar output
FSK Modulator
ASK Modulator
default polarity
[F0, F0+offset]
unipolar output
default polarity
NRZ stream
NRZ stream
Manchester
Manchester
Synchronous Receiver
encoded
encoded
Output
Output
data
data
Txd
Txd
1
1
switches to receiving mode. The demodulated stream is sent to the Manchester decoder.
Because of bit checking inside RF IC, the data transferred to the microcontroller is reduced by a
user-defined number of bits. The Manchester preamble length is to be defined in accordance
with the RF IC configuration.
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start. All data bits, the parity
bit and the stop bits are sampled and the receiver waits for the next start bit. Synchronous mode
operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Figure 21-19
Figure 21-19. Synchronous Mode Character Reception
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Clock
RXD
illustrates a character reception in synchronous mode.
Start
0
0
D0
D1
D2
0
0
D3
D4
D5
D6
D7
1
1
AT32UC3B
Parity Bit
Stop Bit
314
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