AT91SAM9260B-QU Atmel, AT91SAM9260B-QU Datasheet - Page 784

IC ARM9 MCU 208-PQFP

AT91SAM9260B-QU

Manufacturer Part Number
AT91SAM9260B-QU
Description
IC ARM9 MCU 208-PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9260B-QU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Package
208PQFP
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
180 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
96
Interface Type
EBI/Ethernet/SPI/TWI/UART/USART/USB
On-chip Adc
4-chx10-bit
Number Of Timers
6
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Ram Size
8 KB
Maximum Clock Frequency
180 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
Minimum Operating Temperature
- 40 C
Cpu Family
AT91
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
8KB
# I/os (max)
96
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
For Use With
AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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784
Revision
6221E
continued
AT91SAM9260
Comments
Corrected offset values for Channel Data Register3 and Reserved space in
digital Converter (ADC) User Interface” on page
Added
In
conditions to VDDBU.
In
Errata: Added
44.2.6.2 ”Bad sampling of OSCSEL” on page
Added
Updated
Added
Table 41-9, “32 kHz Oscillator Characteristics,” on page
Section 41.7 ”EBI Timings” on page
Table 41-6, “Master Clock Waveform Parameters,” on page
to“SDRAM Controller”
Section 44.2.2.1 ”NAND Flash Boot does not work correctly” on page
Section 44.2.7.2 ”Mobile SDRAM device initialization constraint” on page
”Oscillators”
,
Section 44.2.6.1 ”On-chip RC startup time” on page 786
,
Section 44.2.7.3 ”JEDEC standard compatibility” on page
759, removed sentence on EBI timings conditions.
786.
738,
Table 40-2, “ADC Register
754, for Startup Time corrected parameter
752.
Section 40.6 ”Analog-to-
784.
Mapping”.
786.
and
786.
Section
6221I–ATARM–17-Jul-09
Change
Request
Ref.
4379
4303
4267
4254
4235
4329
4219
4563
4564

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