ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 162

• Manufacturer Part Number: ATMEGA2560V-8AU
• Description: IC AVR MCU 256K 8MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2560V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• A/d Inputs: 16-Channel, 10-Bit
• Cpu Speed: 8 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 86
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 100-pin TQFP
• Programmable Memory: 256K Bytes
• Timers: 2-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.11.10 TCCR3C – Timer/Counter 3 Control Register C
16.11.11 TCCR4C – Timer/Counter 4 Control Register C
16.11.12 TCCR5C – Timer/Counter 5 Control Register C
16.11.13 TCNT1H and TCNT1L – Timer/Counter 1
16.11.14 TCNT3H and TCNT3L – Timer/Counter 3
2549M–AVR–09/10
•
•
•
The FOCnA/FOCnB/FOCnC bits are only active when the WGMn3:0 bits specifies a non-PWM
mode. When writing a logical one to the FOCnA/FOCnB/FOCnC bit, an immediate compare
match is forced on the waveform generation unit. The OCnA/OCnB/OCnC output is changed
according to its COMnx1:0 bits setting. Note that the FOCnA/FOCnB/FOCnC bits are imple-
mented as strobes. Therefore it is the value present in the COMnx1:0 bits that determine the
effect of the forced compare.
A FOCnA/FOCnB/FOCnC strobe will not generate any interrupt nor will it clear the timer in Clear
Timer on Compare Match (CTC) mode using OCRnA as TOP.
The FOCnA/FOCnB/FOCnB bits are always read as zero.
• Bit 4:0 – Reserved Bits
These bits are reserved for future use. For ensuring compatibility with future devices, these bits
must be written to zero when TCCRnC is written.
Bit
(0x92)
Read/Write
Initial Value
Bit
(0xA2)
Read/Write
Initial Value
Bit
(0x122)
Read/Write
Initial Value
Bit
(0x85)
(0x84)
Read/Write
Initial Value
Bit
(0x95)
(0x94)
Read/Write
Initial Value
Bit 7 – FOCnA: Force Output Compare for Channel A.
Bit 6 – FOCnB: Force Output Compare for Channel B.
Bit 5 – FOCnC: Force Output Compare for Channel C.
FOC3A
FOC4A
FOC5A
R/W
R/W
W
W
W
7
0
7
0
7
0
7
0
7
0
FOC3B
FOC4B
FOC5B
R/W
R/W
W
W
W
6
0
6
0
6
0
6
0
6
0
ATmega640/1280/1281/2560/2561
FOC3C
FOC4C
FOC3C
R/W
R/W
W
W
W
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R
R
R
4
–
0
4
–
0
4
–
0
4
0
4
0
TCNT1[15:8]
TCNT3[15:8]
TCNT1[7:0]
TCNT3[7:0]
R/W
R/W
R
R
R
3
0
3
0
3
–
0
3
–
0
3
–
0
R/W
R/W
2
0
2
0
R
R
R
2
–
0
2
–
0
2
–
0
R/W
R/W
R
R
R
1
0
1
0
1
0
1
0
1
0
–
–
–
R/W
R/W
R
R
R
0
0
0
0
0
–
0
0
–
0
0
–
0
TCCR3C
TCCR4C
TCCR5C
TCNT1H
TCNT1L
TCNT3H
TCNT3L
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