P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 14

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
P89V660_662_664_3
Product data sheet
6.2.1 Expanded data RAM addressing
6.2 Memory organization
The various P89V660/662/664 memory spaces are as follows:
The P89V660/662/664 have 512 B/1 kB/2 kB of RAM. See
To access the expanded RAM, the EXTRAM bit must be set and MOVX instructions must
be used. The extra memory is physically located on the chip and logically occupies the
first bytes of external memory (addresses 000H to 0FFH/2FFH/6FFH).
Table 5.
Not bit addressable; Reset value 00H
When EXTRAM = 1, the expanded RAM is indirectly addressed using the MOVX
instruction in combination with any of the registers R0, R1 of the selected bank or DPTR.
Accessing the expanded RAM does not affect ports P0, P3[6] (WR), P3[7] (RD), or P2.
With EXTRAM = 1, the expanded RAM can be accessed as in the following example.
Expanded RAM Access (Indirect Addressing only):
The DPTR points to location 0A0H and the data in the accumulator is written to address
0A0H of the expanded RAM rather than off-chip external memory. Access to EXTRAM
addresses that are not present on the device (above 0FFH for the 89V660, above 2FFH
Bit
Symbol
•
•
•
•
•
MOVX@DPTR, A; DPTR contains 0A0H
DATA
128 B of internal data memory space (00H:7FH) accessed via direct or indirect
addressing, using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area.
IDATA
Indirect Data. 256 B of internal data memory space (00H:FFH) accessed via indirect
addressing using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area. This area includes the DATA area and the 128 B immediately
above it.
SFR
Special Function Registers. Selected CPU registers and peripheral control and status
registers, accessible only via direct addressing.
XDATA
‘External’ Data or Auxiliary RAM. Duplicates the classic 80C51 64 kB memory space
addressed via the MOVX instruction using the DPTR, R0, or R1. The
P89V660/662/664 have 256/768/1792 B of on-chip XDATA memory.
CODE
64 kB of Code memory space, accessed as part of program execution and via the
MOVC instruction. The P89V660/662/664 have 16/32/64 kB of on-chip Code memory.
AUXR - Auxiliary register (address 8EH) bit allocation
7
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Rev. 03 — 10 November 2008
6
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5
-
80C51 with 512 B/1 kB/2 kB RAM, dual I
4
-
P89V660/662/664
3
-
Figure
2
-
4.
EXTRAM
© NXP B.V. 2008. All rights reserved.
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C-bus, SPI
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AO
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