P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 68

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
P89V660_662_664_3
Product data sheet
6.13 Power-saving modes
Table 61.
Not bit addressable; Reset value: 00H
Table 62.
Table 63.
Bit addressable; Reset value: 00H
Table 64.
Table 65.
Not bit addressable; Reset value: 00H
Table 66.
The device provides two power saving modes of operation for applications where power
consumption is critical. The two modes are idle and power-down, see
Bit
7
6
5
4
3
2
1
0
Bit
7 to 2
1
0
Bit
7 to 2
1
0
Bit
Symbol
Bit
Symbol
Bit
Symbol
IP0H - Interrupt priority 0 high register (address B7H) bit allocation
IP0H - Interrupt priority 0 high register (address B7H) bit description
IP1 - Interrupt priority 1 register (address 91H) bit allocation
IP1 - Interrupt priority 1 register (address 91H) bit description
IP1H - Interrupt priority 1 high register (address 92H) bit allocation
IP1H - Interrupt priority 1 high register (address 92H) bit description
PT2H
Symbol
PT2H
PPCH
PS1H
PS0H
PT1H
PX1H
PT0H
PX0H
Symbol
-
PS3
PS2
Symbol
-
PS3H
PS2H
7
7
7
-
-
Rev. 03 — 10 November 2008
PPCH
6
6
6
-
-
Description
Timer 2 Interrupt Priority High Bit.
PCA Interrupt Priority High Bit.
I
Serial Port Interrupt Priority High Bit.
Timer 1 Interrupt Priority High Bit.
External Interrupt 1 Priority High Bit.
Timer 0 Interrupt Priority High Bit.
External Interrupt 0 Priority High Bit.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
SPI Interrupt Priority Low Bit.
I
Description
Reserved for future use. Should be set to ‘0’ by user programs.
SPI Interrupt Priority High Bit.
I
2
2
2
C-bus Interrupt Priority High Bit (primary).
C-bus Interrupt Priority 1 Low Bit (secondary).
C-bus Interrupt Priority High Bit (secondary).
PS1H
5
5
5
-
-
80C51 with 512 B/1 kB/2 kB RAM, dual I
PS0H
4
4
4
-
-
PT1H
P89V660/662/664
3
3
3
-
-
PX1H
2
2
2
-
-
Table
© NXP B.V. 2008. All rights reserved.
PS3H
PT0H
PS3
1
1
1
67.
2
C-bus, SPI
PX0H
PS2H
PS2
68 of 89
0
0
0