LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 636
LPC2460FET208,551
Manufacturer Part Number
LPC2460FET208,551
Description
IC ARM7 MCU ROMLESS 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2460FET208,551
Program Memory Type
ROMless
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4260
935283232551
LPC2460FET208-S
935283232551
LPC2460FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2460FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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UM10237_4
User manual
A sample of how PWM values relate to waveform outputs is shown in
PWM output logic is shown in
double edge controlled PWM outputs via the muxes controlled by the PWMSELn bits. The
match register selections for various PWM outputs is shown in
implementation of the PWM module supports up to N-1 single edge PWM outputs or
(N-1)/2 double edge PWM outputs, where N is the number of match registers that are
implemented. PWM types can be mixed if desired.For LPC2400 devices N = 7 which
gives up to 6 single edge PWM outputs or up to 3 double edge PWM outputs available at
the same time
5. The maximum number of match registers is increased to 7 in order to allow support
6. Add PWM outputs to the timer that connect a functional equivalent of an RS Flip-Flop
7. Three interrupt bits are added to the IR register.
Fig 133. Sample PWM waveforms
for up to 3 double edge PWM channels. This includes the necessary match outputs,
control bits, etc. for each match register:
– Three new Match registers are added, creating Match channels 4 through 6.
– Three additional sets of stop (S), reset (R), and interrupt (I) bits are added to the
to two match outputs. A 2-to-1 mux on each PWM output allows selection of either a
single or a double edged PWM. A new register (PCR) is added to hold the control bits
for the muxes (PWMSEL bits).
MCR register (3 per additional match register).
The waveforms below show a single PWM cycle and demonstrate PWM outputs under the
following conditions:
The timer is configured for PWM mode (counter resets to one).
Match 0 is configured to reset the timer/counter when a match event occurs.
Control bits PWMSEL2 and PWMSEL4 are set.
The Match register values are as follows:
MR0 = 100 (PWM rate)
MR1 = 41, MR2 = 78 (PWM2 output)
MR3 = 53, MR4 = 27 (PWM4 output)
MR5 = 65 (PWM5 output)
PWM2
PWM4
PWM5
Rev. 04 — 26 August 2009
1
Chapter 25: LPC24XX Pulse Width Modulator PWM0/PWM1
Figure 25–132
27
41
53
that allows selection of either single or
65
78
(counter is reset)
Table
100
25–554. This
Figure
UM10237
© NXP B.V. 2009. All rights reserved.
25–133.
636 of 792
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