EP9312-IB Cirrus Logic Inc, EP9312-IB Datasheet - Page 379
EP9312-IB
Manufacturer Part Number
EP9312-IB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9312-IBZ.pdf
(4 pages)
3.EP9312-CB.pdf
(62 pages)
4.EP9312-CB.pdf
(17 pages)
Specifications of EP9312-IB
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1259
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9312-IBZ
Manufacturer:
CIRRUS
Quantity:
30
Company:
Part Number:
EP9312-IBZ
Manufacturer:
HITTITE
Quantity:
1 200
- EP9307-CRZ PDF datasheet
- EP9312-IBZ PDF datasheet #2
- EP9312-CB PDF datasheet #3
- EP9312-CB PDF datasheet #4
- Current page: 379 of 824
- Download datasheet (13Mb)
RXStsQCurAdd
DS785UM1
31
15
Definition:
Bit Descriptions:
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
30
14
29
13
28
12
Receive Status Queue Current Length. The Receive Status Queue Current
Length defines the number of bytes between the Receive Status Current
Address and the end of the receive status queue. This value is used internally
to wrap the pointer back to the start of the queue. The register should not
normally be written to.
RSVD:
RSQCL:
0x8001_00A8 - Read/Write
0x0000_0000
Unchanged
Receive Status Queue Current Address. The Receive Status Queue Base
Address defines the system memory address of the receive status queue.
This address is used by the MAC to reload the Receive Status Queue Current
Status Address whenever the end of the status queue is reached. The base
address should be set at initialization time and must be set to a word aligned
memory address.
RSQCA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
Receive Status Queue Current Length.
Receive Status Queue Current Address.
24
8
RSQCA
RSQCA
23
7
22
6
21
1/10/100 Mbps Ethernet LAN Controller
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
9-77
0
9
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