ST72F63BH6T1 STMicroelectronics, ST72F63BH6T1 Datasheet - Page 132

• Manufacturer Part Number: ST72F63BH6T1
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BH6T1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel / 8 bit, 12 Channel
• For Use With: 497-5521 - EVAL BOARD LOW SPEED USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Instruction set
12.1.2
12.1.3
12.1.4
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Table 49.
Immediate instructions
Immediate instructions have two bytes, the first byte contains the opcode, the second byte
contains the operand value.
Table 50.
Direct
In Direct instructions, the operands are referenced by their memory address.
The direct addressing mode consists of two sub-modes:
Direct (short)
The address is a byte, thus requires only one byte after the opcode, but only allows 00 - FF
addressing space.
Direct (long)
The address is a word, thus allowing 64 Kbyte addressing space, but requires 2 bytes after
the opcode.
Indexed (No Offset, Short, Long)
In this mode, the operand is referenced by its memory address, which is defined by the
unsigned addition of an index register (X or Y) with an offset.
The indirect addressing mode consists of three sub-modes:
Indexed (No Offset)
There is no offset, (no extra byte after the opcode), and allows 00 - FF addressing space.
SLL, SRL, SRA, RLC, RRC
Immediate instruction
ADC, ADD, SUB, SBC
Inherent instructions (continued)
Immediate instructions
Inherent instruction
AND, OR, XOR
CPL, NEG
BCP
SWAP
CP
LD
MUL
Doc ID 7516 Rev 8
Shift and Rotate Operations
Arithmetic Operations
Logical Operations
1 or 2 Complement
Byte Multiplication
Bit Compare
Swap Nibbles
Function
Compare
Function
Load
ST7263Bxx