ST72F63BH6T1 STMicroelectronics, ST72F63BH6T1 Datasheet - Page 64

IC MCU 8BIT 32K FLASH 48-LQFP

ST72F63BH6T1

Manufacturer Part Number
ST72F63BH6T1
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F63BH6T1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
27
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel / 8 bit, 12 Channel
For Use With
497-5521 - EVAL BOARD LOW SPEED USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
On-chip peripherals
Note:
64/186
1
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3
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6
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi will never
be set until the ICiLR register is also read.
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
The two input capture functions can be used together even if the timer also uses the two
output compare functions.
In One Pulse mode and PWM mode only input Capture 2 can be used.
The alternate inputs (ICAP1 and ICAP2) are always directly connected to the timer. So any
transitions on these pins activates the input capture function.
Moreover if one of the ICAPi pins is configured as an input and the second one as an output,
an interrupt can be generated if the user toggles the output pin and if the ICIE bit is set.
This can be avoided if the input capture function i is disabled by reading the ICiHR (see note
1).
The TOF bit can be used with interrupt generation in order to measure events that go
beyond the timer range (FFFFh).
Figure 32. Input Capture block diagram
Figure 33. Input Capture timing diagram
1. The rising edge is the active edge.
ICAP1
ICAP2
pin
pin
COUNTER REGISTER
ICAPi REGISTER
TIMER CLOCK
ICAPi FLAG
16-BIT
EDGE DETECT
ICAPi PIN
IC2R register
16-BIT FREE RUNNING
CIRCUIT2
COUNTER
FF01
EDGE DETECT
CIRCUIT1
IC1R register
Doc ID 7516 Rev 8
FF02
ICF1
ICIE
FF03
ICF2
(Control register 1) CR1
(Control register 2) CR2
CC1
(Status register) SR
CC0
FF03
0
IEDG2
IEDG1
0
0
ST7263Bxx

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