ST72F63BH6T1 STMicroelectronics, ST72F63BH6T1 Datasheet - Page 55

• Manufacturer Part Number: ST72F63BH6T1
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BH6T1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel / 8 bit, 12 Channel
• For Use With: 497-5521 - EVAL BOARD LOW SPEED USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST7263Bxx
Note:
11.1.4
11.1.5
11.1.6
Figure 26. Watchdog block diagram
Table 17.
Following a reset, the watchdog is disabled. Once activated it cannot be disabled, except by
a reset.
The T6 bit can be used to generate a software reset (the WDGA bit is set and the T6 bit is
cleared).
Software Watchdog option
If Software Watchdog is selected by option byte, the watchdog is disabled following a reset.
Once activated it cannot be disabled, except by a reset.
The T6 bit can be used to generate a software reset (the WDGA bit is set and the T6 bit is
cleared).
Hardware Watchdog option
If Hardware Watchdog is selected by option byte, the watchdog is always active and the
WDGA bit in the CR is not used.
Low power modes
WAIT instruction
No effect on Watchdog.
a
Max
Min
Watchdog timing (f
CR register initial value
f
CPU
WDGA
RESET
Doc ID 7516 Rev 8
C0h
FFh
CPU
T6
= 8 MHz)
T5
WATCHDOG CONTROL REGISTER (CR)
7-BIT DOWNCOUNTER
CLOCK DIVIDER
T4
÷49152
T3
T2
WDG timeout period (ms)
T1
393.216
6.144
On-chip peripherals
T0
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