ST72F561J4T6 STMicroelectronics, ST72F561J4T6 Datasheet - Page 179

• Manufacturer Part Number: ST72F561J4T6
• Description: IC MCU 8BIT 16K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: ST72F5x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

beCAN CONTROLLER (Cont’d)
Filter Bank Scale and Mode Configuration
The filter banks are configured by means of the
corresponding CFCRx register. To configure a fil-
ter bank this must be deactivated by clearing the
FACT bit in the CFCR register. The filter scale is
configured by means of the FSC[1:0] bits in the
corresponding CFCR register, refer to
Filter Bank Scale Configuration - Register Organi-
sation. The identifier list or identifier mask mode
for the corresponding Mask/Identifier registers is
configured by means of the FMCLx and FMCHx
bits in the CFMR register. The FMCLx bit defines
the mode for the two least significant bytes, and
the FMCHx bit the mode for the two most signifi-
cant bytes of filter bank x. Examples:
– If filter bank 1 is configured as two 16-bit filters,
– If filter bank 2 is configured as four 8-bit filters,
Note: In 32-bit configuration, the FMCLx and FM-
CHx bits must have the same value to ensure that
the four Mask/Identifier registers are in the same
mode.
To filter a group of identifiers, configure the Mask/
Identifier registers in mask mode.
To select single identifiers, configure the Mask/
Identifier registers in identifier list mode.
Filters not used by the application should be left
deactivated.
Filter Match Index
Once a message has been received in the FIFO it
is available to the application. Typically application
then the FMCL1 bit defines the mode of the
CF1R2 and CF1R3 registers and the FMCH1 bit
defines the mode of the CF1R6 and CF1R7 reg-
isters.
then the FMCL2 bit defines the mode of the
CF2R1 and CF2R3 registers and the FMCH2 bit
defines the mode of the CF2R5 and CF2R7 reg-
isters.
Figure 9.
data are copied into RAM locations. To copy the
data to the right location the application has to
identify the data by means of the identifier. To
avoid this and to ease the access to the RAM loca-
tions, the CAN controller provides a Filter Match
Index.
This index is stored in the mailbox together with
the message according to the filter priority rules.
Thus each received message has its associated
Filter Match Index.
The Filter Match Index can be used in two ways:
– Compare the Filter Match Index with a list of ex-
– Use the Filter Match Index as an index on an ar-
For non-masked filters, the software no longer has
to compare the identifier.
If the filter is masked the software reduces the
comparison to the masked bits only.
Filter Priority Rules
Depending on the filter combination it may occur
that an identifier passes successfully through sev-
eral filters. In this case the filter match value stored
in the receive mailbox is chosen according to the
following rules:
– A filter in identifier list mode prevails on an filter
– A filter with full identifier coverage prevails over
– Filters configured in the same mode and with
pected values.
ray to access the data destination location.
in mask mode.
filters covering part of the identifier, e.g. 16-bit fil-
ters prevail over 8-bit filters.
identical coverage are prioritized by filter number
and register number. The lower the number the
higher the priority.
ST72561
179/265