ST72F561J4T6 STMicroelectronics, ST72F561J4T6 Datasheet - Page 248

• Manufacturer Part Number: ST72F561J4T6
• Description: IC MCU 8BIT 16K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: ST72F5x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST72561
ADC CHARACTERISTICS (Cont’d)
ADC Accuracy with f
Figure 145. ADC Accuracy Characteristics
Notes:
1. Data based on characterization results, not tested in production. ADC Accuracy vs. Negative Injection Current: Inject-
ing negative current on any of the standard (non-robust) analog input pins should be avoided as this significantly reduces
the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin
to ground) to standard analog pins which may potentially inject negative current. The effect of negative injection current
on robust pins is specified in
Any positive injection current within the limits specified for I
accuracy.
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Symbol
1023
1022
1021
|E
|E
|E
|E
|E
O
G
D
T
L
7
6
5
4
3
2
1
|
|
|
|
|
0
V
SSA
Digital Result ADCDR
Total unadjusted error
Offset error
Gain Error
Differential linearity error
Integral linearity error
1LSB
1
E
O
IDEAL
2
1)
3
1)
=
CPU
V
---------------------------------------- -
DDA
Parameter
4
Section
1024
= 8 MHz, f
–
5
1 LSB
1)
V
1)
SSA
1)
E
12.9.
6
T
IDEAL
E
7
L
ADC
(2)
= 4 MHz R
E
D
1021 1022 1023 1024
(3)
INJ(PIN)
AIN
(1)
< 10
E
Conditions
G
and ΣI
V
DDA
kΩ,
INJ(PIN)
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
V
T
O
G
D
L
DD
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
=Differential Linearity Error: maximum deviation
V
in
in
= 5V
(LSB
Section 12.9
IDEAL
Typ
3.2
0.7
1.5
1.2
)
1
does not affect the ADC
Max
2.3
3.6
5
4
Unit
LSB