F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 142

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F272-BAG-T-TR

Manufacturer Part Number
F272-BAG-T-TR
Description
MCU 16BIT 256K FLASH 144-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of F272-BAG-T-TR

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-TQFP, 144-VQFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
ASC, CAN, I2C, SSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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0
Electrical characteristics
142/182
besides, it sources charge during the sampling phase, when the analog signal source is a
high-impedance source.
A real filter, can typically be obtained by using a series resistance with a capacitor on the
input pin (simple RC Filter). The RC filtering may be limited according to the value of source
impedance of the transducer or circuit supplying the analog signal to be measured. The filter
at the input pins must be designed taking into account the dynamic characteristics of the
input signal (bandwidth).
Figure 40. A/D converter input pins scheme
Input Leakage and external circuit
The series resistor utilized to limit the current to a pin (see R
with a large source impedance can lead to a degradation of A/D converter accuracy when
input leakage is present.
Data about maximum input leakage current at each pin are provided in the Data Sheet
(Electrical Characteristics section). Input leakage is greatest at high operating temperatures,
and in general it decreases by one half for each 10° C decrease in temperature.
Considering that, for a 10-bit A/D converter one count is about 5mV (assuming V
an input leakage of 100nA acting though an R
error of exactly one count (5mV); if the resistance were 100kΩ the error would become two
counts.
Eventual additional leakage due to external clamping diodes must also be taken into
account in computing the total leakage affecting the A/D converter measurements. Another
contribution to the total leakage is represented by the charge sharing effects with the
sampling capacitance: being C
equal to the conversion rate of a single channel (maximum when fixed channel continuous
conversion mode is selected), it can be seen as a resistive path to ground. For instance,
assuming a conversion rate of 250kHz, with C
obtained (R
channel). To minimize the error induced by the voltage partitioning between this resistance
(sampled voltage on C
must be designed to respect the following relation:
EQ
V
A
= 1 / f
Source
R
S
C
EXTERNAL CIRCUIT
C
S
S
R
R
C
R
R
R
C
C
) and the sum of R
, where f
S
F
F
L
SW
AD
P
S
V A
Current Limiter Resistance
Source Impedance
Filter Resistance
Filter Capacitance
Pin Capacitance (two contributions, C
Sampling Capacitance
Sampling Switch Impedance
Channel Selection Switch Impedance
R
Filter
F
C
S
R S
----------------------------------------------------------------------------- -
F
substantially a switched capacitance, with a frequency
C
+
represents the conversion rate at the considered
Current Limiter
R F
+
R
R L
L
R EQ
S
+ R
+
L
S
R SW
= 50kΩ of external resistance leads to an
equal to 4pF, a resistance of 1MΩ is
F
C
+ R
P1
+
P1
R AD
L
and C
+ R
INTERNAL CIRCUIT SCHEME
V
DD
<
SW
P2
1
-- - LSB
2
L
)
Selection
Channel
in
+ R
R
SW
Figure
C
AD
P2
ST10F272B/ST10F272E
, the external circuit
Sampling
40), in combination
R
AD
C
S
AREF
= 5V),

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