F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 172

• Manufacturer Part Number: F272-BAG-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAG-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Electrical characteristics
24.8.19
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External bus arbitration
V
Table 80.
1. Partially tested, guaranteed by design characterization.
Figure 59. External bus arbitration (releasing the bus)
1. The ST10F272 will complete the currently running bus cycle before granting bus access.
2. This is the first possibility for BREQ to become active.
3. The CS outputs will be resistive high (pull-up) after t
t
t
t
t
t
t
t
61
62
63
64
65
66
67
DD
Symbol
= 5V ± 10%, V
SR
CC
CC
CC
CC
CC
CC
CLKOUT
HOLD
HLDA
BREQ
CSx
(P6.x)
Others
External bus arbitration timings
HOLD input setup time
to CLKOUT
CLKOUT to HLDA high
or BREQ low delay
CLKOUT to HLDA low
or BREQ high delay
CSx release
CSx drive
Other signals release
Other signals drive
SS
Parameter
= 0V, T
t
1)
61
A
= -40 to +125°C, C
1)
1)
1)
min.
18.5
– 4
– 4
F
TCL = 12.5 ns
–
–
–
–
CPU
64
.
= 40 MHz
L
t
66
t
= 50pF
63
max.
12.5
12.5
20
15
20
15
–
t
t
62
64
3)
2)
1/2 TCL = 1 to 64MHz
Variable CPU Clock
min.
18.5
– 4
– 4
–
–
–
–
ST10F272B/ST10F272E
max.
12.5
12.5
20
15
20
15
–
ns
ns
ns
ns
ns
ns
ns