F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 42

• Manufacturer Part Number: F272-BAG-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAG-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Internal Flash memory
5.6
Note:
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Write operation examples
In the following, examples for each kind of Flash write operation are presented.
The write operation commands must be executed from another memory (internal RAM or
external memory), as in ST10F269 device. In fact, due to IBus characteristics, it is not
possible to perform write operation in Flash while fetching code from Flash.
Moreover, direct addressing is not allowed for write accesses to IFlash control registers.
This means that both address and data for a writing operation must be loaded in one of
ST10 GPR register (R0...R15).
Write operation on IBus registers is 16 bit wide.
Example of indirect addressing mode
Word program
Example: 32-bit Word Program of data 0xAAAAAAAA at address 0x025554
Double word program
Example: Double Word Program (64-bit) of data 0x55AA55AA at address 0x035558 and
data 0xAA55AA55 at address 0x03555C in IFLASH Module.
Double Word Program is always performed on the Double Word aligned on a even Word: bit
ADD2 of FARL is ignored.
Sector erase
Example: Sector Erase of sectors B0F1 and B0F0 of Bank 0 in IFLASH Module.
MOV RWm, #ADDRESS;
MOV RWn, #DATA;
MOV [RWm], RWn;
FCR0H|= 0x2000;
FARL = 0x5554;
FARH = 0x0002;
FDR0L = 0xAAAA;
FDR0H = 0xAAAA;
FCR0H|= 0x8000;
FCR0H
FARL
FARH
FDR0L
FDR0H
FDR1L
FDR1H
FCR0H
FCR0H
FCR1L
FCR0H
|= 0x8000;
|= 0x0800;
|= 0x0003;
|= 0x8000;
|= 0x1000;
= 0x5558;
= 0x0003;
= 0x55AA;
= 0x55AA;
= 0xAA55;
= 0xAA55;
/*Load Add in RWm*/
/*Load Data in RWn*/
/*Indirect addressing*/
/*Set WPG in FCR0H*/
/*Load Add in FARL*/
/*Load Add in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
/*Operation start*/
/*Set DWPG/
/*Load Add in FARL*/
/*Load Add in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
/*Load Data in FDR1L*/
/*Load Data in FDR1H*/
/*Operation start*/
/*Set SER in FCR0H*/
/*Set B0F1, B0F0*/
/*Operation start*/
ST10F272B/ST10F272E