ST10F272M-4T3 STMicroelectronics, ST10F272M-4T3 Datasheet - Page 142

• Manufacturer Part Number: ST10F272M-4T3
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
24.8.3
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Figure 45. Generation mechanisms for the CPU clock
Clock generation modes
The next
generation mode.
Table 61.
1. The external clock input range refers to a CPU clock range of 1...40 MHz. Moreover, the PLL usage is
2. The maximum depends on the duty cycle of the external clock signal. When 40 MHz is used, 50% duty
3. The limits on input frequency are 4-8 MHz since the usage of the internal oscillator amplifier is required.
1
1
1
1
0
0
0
0
limited to 4-8 MHz. All configurations need a crystal (or ceramic resonator) to generate the CPU clock
through the internal oscillator amplifier (apart from direct drive). Vice versa, the clock can be forced through
an external clock source only in direct drive mode (on-chip oscillator amplifier disabled, so no crystal or
resonator can be used).
cycle is granted (low phase = high phase = 12.5 ns); when 20 MHz is selected a 25 % duty cycle can be
accepted (minimum phase, high or low, again equal to 12.5 ns).
Also when the PLL is not used and the CPU clock corresponds to f
must be used: It is not possible to force any clock though an external clock source.
(P0H.7-5)
P0.15-13
1
1
0
0
1
1
0
0
Table 61
On-chip clock generator selections
Phase locked loop operation
Direct clock drive
Prescaler operation
1
0
1
0
1
0
1
0
f
f
f
f
f
f
XTAL
CPU
XTAL
CPU
XTAL
CPU
associates the combinations of these three bits with the respective clock
CPU frequency
f
CPU
f
f
f
f
f
f
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
f
= f
XTAL
XTAL
-
x 10
x 4
x 3
x 8
x 5
x 1
/2
x F
input range
External clock
5.3 to 8 MHz
6.4 to 8 MHz
1 to 40 MHz
4 to 8 MHz
4 to 5 MHz
4 to 8 MHz
4 MHz
-
(1)(3)
XTAL
Default configuration
Direct drive (oscillator bypassed)
CPU clock via prescaler
Reserved
/2, an external crystal or resonator
TCL
TCL
TCLTCL
TCLTCL
Notes
ST10F272M
(3)
(2)