HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 121
HD64F3672FPIV
Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3672FXV.pdf
(334 pages)
Specifications of HD64F3672FPIV
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 121 of 334
- Download datasheet (2Mb)
The group of this LSI has twenty-six general I/O ports and four general input-only ports. Port 8 is
a large current port, which can drive 20 mA (@V
Any of these ports can become an input port immediately after a reset. They can also be used as
I/O pins of the on-chip peripheral modules or external interrupt input pins, and these functions can
be switched depending on the register settings. The registers for selecting these functions can be
divided into two types: those included in I/O ports and those included in each on-chip peripheral
module. General I/O ports are comprised of the port control register for controlling inputs/outputs
and the port data register for storing output data and can select inputs/outputs in bit units. For
functions in each port, see appendix B.1, I/O Port Block Diagrams. For the execution of bit
manipulation instructions to the port control register and port data register, see section 2.8.3, Bit
Manipulation Instruction.
9.1
Port 1 is a general I/O port also functioning as IRQ interrupt input pins and a timer V input pin.
Figure 9.1 shows its pin configuration.
Port 1 has the following registers.
Port mode register 1 (PMR1)
Port control register 1 (PCR1)
Port data register 1 (PDR1)
Port pull-up control register 1 (PUCR1)
Port 1
Figure 9.1 Port 1 Pin Configuration
Section 9 I/O Ports
Port 1
OL
= 1.5 V) when a low level signal is output.
P17/IRQ3/TRGV
P16
P15
P14/IRQ0
P12
P11
P10
Rev.4.00 Nov. 02, 2005 Page 95 of 304
Section 9 I/O Ports
REJ09B0143-0400
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