HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 153

MCU 3/5V 16K I-TEMP PB-FREE 64-L

HD64F3672FPIV

Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3672FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
10.5.2
The trigger function can be used to output a pulse with an arbitrary pulse width at an arbitrary
delay from the TRGV input, as shown in figure 10.10. To set up this output:
1. Set bits CCLR1 and CCLR0 in TCRV0 so that TCNTV will be cleared by compare match with
2. Set bits OS3 to OS0 in TCSRV so that the output will go to 1 at compare match with TCORA
3. Set bits TVEG1 and TVEG0 in TCRV1 and set TRGE to select the falling edge of the TRGV
4. Set bits CKS2 to CKS0 in TCRV0 and bit ICKS0 in TCRV1 to select the desired clock source.
5. After these settings, a pulse waveform will be output without further software intervention,
TCORB.
and to 0 at compare match with TCORB.
input.
with a delay determined by TCORA from the TRGV input, and a pulse width determined by
(TCORB – TCORA).
H'FF
TCORB
TCORA
H'00
TRGV
TMOV
Pulse Output with Arbitrary Pulse Width and Delay from TRGV Input
Figure 10.10 Example of Pulse Output Synchronized to TRGV Input
TCNTV value
Compare match A
Compare match B
clears TCNTV and
halts count-up
Counter cleared
Compare match A
Rev.4.00 Nov. 02, 2005 Page 127 of 304
Compare match B
clears TCNTV and
halts count-up
Section 10 Timer V
REJ09B0143-0400
Time

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