HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 177

MCU 3/5V 16K I-TEMP PB-FREE 64-L

HD64F3672FPIV

Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3672FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
11.5
11.5.1
Figure 11.14 shows the TCNT count timing when the internal clock source is selected. Figure
11.15 shows the timing when the external clock source is selected. The pulse width of the external
clock signal must be at least two system clock ( ) cycles; shorter pulses will not be counted
correctly.
11.5.2
The compare match signal is generated in the last state in which TCNT and GR match (when
TCNT changes from the matching value to the next value). When the compare match signal is
generated, the output value selected in TIOR is output at the compare match output pin (FTIOA,
FTIOB, FTIOC, or FTIOD).
When TCNT matches GR, the compare match signal is generated only after the next counter clock
pulse is input.
Operation Timing
TCNT Count Timing
Output Compare Output Timing
Internal
clock
TCNT input
clock
TCNT
External
clock
TCNT input
clock
TCNT
Figure 11.15 Count Timing for External Clock Source
Figure 11.14 Count Timing for Internal Clock Source
Rising edge
N
N
Rising edge
N+1
N+1
Rising edge
Rev.4.00 Nov. 02, 2005 Page 151 of 304
N+2
N+2
Section 11 Timer W
REJ09B0143-0400

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