HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 87
HD64F3672FPIV
Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3672FXV.pdf
(334 pages)
Specifications of HD64F3672FPIV
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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4.3
When an address break is set to an instruction after a conditional branch instruction, and the
instruction set when the condition of the branch instruction is not satisfied is executed (see figure
4.3), note that an address break interrupt request is not generated. Therefore an address break must
not be set to the instruction after a conditional branch instruction.
When another interrupt request is accepted before an instruction to which an address break is set is
executed, exception handling of an address break interrupt is not executed. However, the ABIF bit
is set to 1 (see figure 4.4). Therefore the ABIF bit must be read during exception handling of an
address break interrupt.
Figure 4.3 Operation when Condition is not Satisfied in Branch Instruction
Usage Notes
Address bus
Address break
interrupt request
[Register setting]
ABRKCR=H'80
BAR=H'0136
instruction
prefetch
BNE
0134
instruction
prefetch
NOP
0136
*0136
[Program]
012A
0134
0138
:
:
instruction
prefetch
MOV
102A
NOP
BNE
NOP
MOV.B . . .
:
:
instruction
prefetch
Rev.4.00 Nov. 02, 2005 Page 61 of 304
NOP
0138
Section 4 Address Break
REJ09B0143-0400
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